Since the early days of microminiaturization, the design and implementation of filters has presented special problems relating to the difficulty in miniaturizing conventional LCR (inductor-capacitor-resistor) filters for integration on a chip. In particular, integrating the inductor component has proven to be a difficult challenge. Thus, there has been a preference for the use of inductor-less alternatives to LCR filters that are compatible with microminiaturization and on-chip integration. This continues to be necessary because, in spite of the “digital revolution,” the so-called “analog front end” (AFE) of most electronic devices, which interface with the real world, is and will continue to be, analog.
The design of high-accuracy analog circuits is becoming more difficult with current mixed-signal integrated circuits because of the scaling down of both circuit supply voltages and transistor channel lengths. Most of these circuits require the use of high performance active filters. For example, radio-frequency (RF) transceivers make use of high gain filters at the intermediate frequency (IF). Indeed, the gain achievable in the early stages of the receiver is limited due to the high operation frequency. Even electronics circuits for micro-mechanical sensors (MEMS) require high gain filters. For example, high gain filters are used to evaluate the movement of mechanical parts by evaluating the charge variations in their capacitance. Unfortunately, the high value of the resistors required in the active filter in order to implement a high gain leads to a waste of circuit area and an increase in the cost of production. Furthermore, due to the dimensions of such resistors, the parasitic effects are not negligible and introduce distortion in the frequency response of the filter. Even the in-band group-delay variation could be affected.
For these reasons there is a need in the art for a new approach/topology to implement a filter with a high-gain and accurate transfer function.
Reference is now made to FIG. 1 showing a circuit diagram for a second order complex band-pass filter circuit. The topology used is referred to in the art as the leapfrog topology. The leapfrog topology is preferred because it provides for a low sensitivity to process and mismatch variation. This is important for a complex band-pass filter in order to guarantee an accurate image rejection in a frequency down conversion circuit.
The filter circuit receives a differential in-phase input signal II and a differential quadrature-phase input signal IQ. The filter circuit outputs a differential in-phase output signal VI and a differential quadrature-phase output signal VQ.
The differential in-phase input signal II is applied to the differential inputs of a first operational amplifier 10. The differential outputs of the first operational amplifier 10 are coupled to the differential inputs of the first operational amplifier through a feedback network formed by resistor R1 connected in parallel with capacitor C1. Specifically, the non-inverting output of the first operational amplifier 10 is coupled to the non-inverting input of the first operational amplifier 10 by R1 and C1 connected in parallel, while the inverting output of the first operational amplifier 10 is coupled to the inverting input of the first operational amplifier 10 by R1 and C1 connected in parallel.
The differential quadrature-phase input signal IQ is applied to the differential inputs of a second operational amplifier 12. The differential outputs of the second operational amplifier 12 are cross-coupled to the differential inputs of the second operational amplifier through a feedback network formed by resistor R2 connected in parallel with capacitor C2. Specifically, the non-inverting output of the second operational amplifier 12 is coupled to the inverting input of the second operational amplifier 12 by R2 and C2 connected in parallel, while the inverting output of the second operational amplifier 12 is coupled to the non-inverting input of the second operational amplifier 10 by R2 and C2 connected in parallel.
In a preferred implementation, R1=R2 and C1=C2.
The differential outputs of the first operational amplifier 10 are further cross-coupled to the differential inputs of the second operational amplifier 12 by resistors R3. Specifically, the non-inverting output of the first operational amplifier 10 is coupled to the inverting input of the second operational amplifier 12 by R3, while the inverting output of the first operational amplifier 10 is coupled to the non-inverting input of the second operational amplifier 12 by R3.
The differential outputs of the second operational amplifier 12 are further coupled to the differential inputs of the first operational amplifier 10 by resistors R4. Specifically, the non-inverting output of the second operational amplifier 12 is coupled to the non-inverting input of the first operational amplifier 10 by R4, while the inverting output of the second operational amplifier 12 is coupled to the inverting input of the first operational amplifier 10 by R4.
In a preferred implementation, R3=R4.
The differential outputs of the first operational amplifier 10 are further cross-coupled to the differential inputs of a third operational amplifier 14 by resistors R5. Specifically, the non-inverting output of the first operational amplifier 10 is coupled to the inverting input of the third operational amplifier 14 by R5, while the inverting output of the first operational amplifier 10 is coupled to the non-inverting input of the third operational amplifier 14 by R5.
The differential outputs of the second operational amplifier 12 are further cross-coupled to the differential inputs of a fourth operational amplifier 16 by resistors R6. Specifically, the non-inverting output of the second operational amplifier 12 is coupled to the inverting input of the fourth operational amplifier 16 by R6, while the inverting output of the second operational amplifier 12 is coupled to the non-inverting input of the fourth operational amplifier 16 by R6.
In a preferred implementation, R5=R6.
The differential outputs of the third operational amplifier 14 (at the differential in-phase output signal VI) are coupled to the differential inputs of the third operational amplifier through a feedback network formed by resistor R7 connected in parallel with capacitor C3. Specifically, the non-inverting output of the third operational amplifier 14 is coupled to the non-inverting input of the third operational amplifier 14 by R7 and C3 connected in parallel, while the inverting output of the third operational amplifier 14 is coupled to the inverting input of the third operational amplifier 14 by R7 and C3 connected in parallel.
The differential outputs of the fourth operational amplifier 16 (at the differential quadrature-phase output signal VQ) are cross-coupled to the differential inputs of the fourth operational amplifier through a feedback network formed by resistor R8 connected in parallel with capacitor C4. Specifically, the non-inverting output of the fourth operational amplifier 16 is coupled to the inverting input of the fourth operational amplifier 16 by R8 and C4 connected in parallel, while the inverting output of the fourth operational amplifier 16 is coupled to the non-inverting input of the fourth operational amplifier 16 by R8 and C4 connected in parallel.
In a preferred implementation, R7=R8 and C3=C4.
The differential outputs of the third operational amplifier 14 (at the differential in-phase output signal VI) are further coupled to the differential inputs of the first operational amplifier 10 through a feedback network formed by resistors R9. Specifically, the non-inverting output of the third operational amplifier 14 is coupled to the non-inverting input of the first operational amplifier 10 by R9, while the inverting output of the third operational amplifier 14 is coupled to the inverting input of the first operational amplifier 10 by R9.
The differential outputs of the fourth operational amplifier 16 (at the differential quadrature-phase output signal VQ) are further cross-coupled to the differential inputs of the second operational amplifier 12 through a feedback network formed resistors R10. Specifically, the non-inverting output of the fourth operational amplifier 16 is coupled to the inverting input of the second operational amplifier 12 by R10, while the inverting output of the fourth operational amplifier 16 is coupled to the non-inverting input of the second operational amplifier 12 by R10.
In a preferred implementation, R9=R10.
The differential outputs of the third operational amplifier 14 are further cross-coupled to the differential inputs of the fourth operational amplifier 16 by resistors R11. Specifically, the non-inverting output of the third operational amplifier 14 is coupled to the inverting input of the fourth operational amplifier 16 by R11, while the inverting output of the third operational amplifier 14 is coupled to the non-inverting input of the fourth operational amplifier 16 by R11.
The differential outputs of the fourth operational amplifier 16 are further coupled to the differential inputs of the third operational amplifier 14 by resistors R12. Specifically, the non-inverting output of the fourth operational amplifier 16 is coupled to the non-inverting input of the third operational amplifier 14 by R12, while the inverting output of the fourth operational amplifier 16 is coupled to the inverting input of the third operational amplifier 14 by R12.
In a preferred implementation, R11=R12.
Consider the filter specifications as shown in the following table:
ParameterSpecificationunitGain128dBΩCenter Frequency (ωo)1.33MHzBandwidth1.6MHzOutput Noise (Vno)700nV/√HzLinearityGroup Delay60nsCurrent Consumption500μA
The corresponding transfer function for the filter implemented as in FIG. 1 is shown in FIG. 2A. This is the transfer function considering an ideal implementation of the filter, i.e. using ideal operational amplifiers and an ideal passive network. The related group-delay for the filter implemented as in FIG. 1 is shown in FIG. 2B.
Unfortunately, in a practical implementation, ideal components are not available. Considering the design equations the value of feedback resistors R10 and R11, from input to output, it is directly proportional to the gain Go of the amplifier, i.e.:Go=122 dbΩs.e.20 log(R10)=122 dBΩ; R10=R11≈1.26 MΩ
The problem is that this value of resistance is very high and will have a direct impact on the area of silicon occupied by the circuit and thus the cost of the device. Furthermore, even considering use of an ideal operational amplifier, the transfer function and group delay will be distorted as shown in FIGS. 3A and 3B, respectively.
In a communication system the distortion of the transfer function could lead to a loss of information and could be unacceptable. The distortions are due to the high value and large size resistors. Indeed, even at low frequency (for example, 1.33 MHz), the parasitic effects for such high value resistors are not negligible. The maximum value usable for high resistivity poly resistors in a standard CMOS technology is limited. Hence, in order to implement a high value resistor it will be necessary to use the series connection of many polysilicon resistors. The occupied silicon area of such a resistor will be very high. Furthermore, the connection and the parasitic capacitances (Cp) will be not negligible. The model of such a high value resistor is shown in FIG. 4. These parasitic effects will make changes in the wanted transfer function called distortions.
Thus, there would be an advantage if the filter could be implemented using smaller value resistors while still providing for a high gain with an accurate transfer function.